sky130_fd_sc_hd standard cell merge script

(defparameter *sp-license*
"* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the \"License\");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
*     https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an \"AS IS\" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* SPDX-License-Identifier: Apache-2.0

.global VDD VSS VNW VPW

"
  )

(defparameter *verilog-license*
"/**
 * Copyright 2020 The SkyWater PDK Authors
 *
 * Licensed under the Apache License, Version 2.0 (the \"Licensei\");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *     https://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an \"AS IS\" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 *
 * SPDX-License-Identifier: Apache-2.0
 */
"
  )

(defparameter *stcs*
  (psplit "\\s+"
"a2111o   a222oi   a32oi   buf            conb   dfxtp   dlxtp         einvn           lpflow_clkbufkapwr     lpflow_lsbuf_lh_hl_isowell_tap  nand3    nor4b    o221a    o32a   or4bb     sdfxbp       xnor3
a2111oi  a22o     a41o    bufbuf         decap  diode   dlygate4sd1   einvp           lpflow_clkinvkapwr     lpflow_lsbuf_lh_isowell         nand3b   nor4bb   o221ai   o32ai  probec_p  sdfxtp       xor2
a211o    a22oi    a41oi   bufinv         dfbbn  dlclkp  dlygate4sd2   fa              lpflow_decapkapwr      lpflow_lsbuf_lh_isowell_tap     nand4    o2111a   o22a     o41a   probe_p   sdlclkp      xor3
a211oi   a2bb2o   and2    clkbuf         dfbbp  dlrbn   dlygate4sd3   fah             lpflow_inputiso0n      macro_sparecell                 nand4b   o2111ai  o22ai    o41ai  sdfbbn    sedfxbp
a21bo    a2bb2oi  and2b   clkdlybuf4s15  dfrbp  dlrbp   dlymetal6s2s  fahcin          lpflow_inputiso0p      maj3                            nand4bb  o211a    o2bb2a   or2    sdfbbp    sedfxtp
a21boi   a311o    and3    clkdlybuf4s18  dfrtn  dlrtn   dlymetal6s4s  fahcon          lpflow_inputiso1n      mux2                            nor2     o211ai   o2bb2ai  or2b   sdfrbp    tap
a21o     a311oi   and3b   clkdlybuf4s25  dfrtp  dlrtp   dlymetal6s6s  fill            lpflow_inputiso1p      mux2i                           nor2b    o21a     o311a    or3    sdfrtn    tapvgnd
a21oi    a31o     and4    clkdlybuf4s50  dfsbp  dlxbn   ebufn         ha              lpflow_inputisolatch   mux4                            nor3     o21ai    o311ai   or3b   sdfrtp    tapvgnd2
a221o    a31oi    and4b   clkinv         dfstp  dlxbp   edfxbp        inv             lpflow_isobufsrc       nand2                           nor3b    o21ba    o31a     or4    sdfsbp    tapvpwrvgnd
a221oi   a32o     and4bb  clkinvlp       dfxbp  dlxtn   edfxtp        lpflow_bleeder  lpflow_isobufsrckapwr  nand2b                          nor4     o21bai   o31ai    or4b   sdfstp    xnor2	"
	))

(defparameter *sp* "/tmp/sc.sp")
(defparameter *verilog* "/tmp/sc.v")
(defparameter *gds* "/tmp/sc.gds")

(defun merge-stc ()
  (with-fp-w f *sp* (format f "~A~%" *sp-license*))
  (with-fp-w f *verilog* (format f "~A~%" *verilog-license*))
  (map 'list
	   (lambda (c)
		 (let*((c0 (string+"sky130_fd_sc_hd__"c))
			   (c1 (string-upcase c))
			   (verilog (string+ c"/"c0".functional.v"))
			   (verilog-b ""))
		   (format t "~A 	-> " c0)
		   (if (probe-file verilog)
			 (let ((rd nil))
			   (with-fp-r 
				 f verilog
				 (do ((line (read-line f nil 'eof)
							(read-line f nil 'eof)))
				   ((equalp line 'eof))
				   (if (pscan "^module" line) (setf rd t))
				   (if rd (setf verilog-b (string+ verilog-b line #\Newline)))
				   (if (pscan "^endmodule" line) (setf rd nil))
				   )
				 )
			   ))
		   (map 'list
				(lambda (d)
				  (let*((sp (string+ c"/sky130_fd_sc_hd__"c"_"d".spice"))
						(gds (string+ c"/sky130_fd_sc_hd__"c"_"d".gds"))
						(c1d (string-upcase (string+ c"_"d)))
						(verilog-b1 (preplace c0 verilog-b c1d))
						(sp-b "")
						(gds-b ""))
					(if (probe-file gds) 
					  (let ()
						(appendgds gds)
						(setf gds-b (string-upcase (with-output-to-string (gs) (format gs "~S" (get-cell (string+"sky130_fd_sc_hd__"c"_"d))))))
						))
					(if (probe-file sp)
					  (let ((rd nil))
						(format t "~A " c1d)
						(with-fp-w+ f *verilog* (format f "~%~A~%" verilog-b1))
						(with-fp-r
						  f sp
						  (do ((line (read-line f nil 'eof)
									 (read-line f nil 'eof)))
							((equalp line 'eof))
							(if (pscan "^[\\.]{1}SUBCKT" (string-upcase line))
							  (let ()
								(setf rd t)
								(setf line (preplace "[\\s]+VGND" (string-upcase line) ""))
								(setf line (preplace "[\\s]+VNB" (string-upcase line) ""))
								(setf line (preplace "[\\s]+VPB" (string-upcase line) ""))
								(setf line (preplace "[\\s]+VPWR" (string-upcase line) ""))
								))
							(if rd 
							  (let()
								(setf line (preplace "VGND" (string-upcase line) "VSS"))
								(setf line (preplace "VNB" (string-upcase line) "VPW"))
								(setf line (preplace "VPB" (string-upcase line) "VNW"))
								(setf line (preplace "VPWR" (string-upcase line) "VDD"))
								(if (pscan "PFET" line) (setf line (preplace "^X" (string-upcase line) "M")))
								(if (pscan "NFET" line) (setf line (preplace "^X" (string-upcase line) "M")))
								;(if (pscan "^M" line) (setf line (preplace "[\\s]+A" (string-upcase line) " NET")))
								(setf sp-b (string+ sp-b (string-upcase line) #\Newline))
								))
							(if (pscan "^[\\.]{1}ENDS" (string-upcase line)) (setf rd nil))
							)
						  )
						(setf sp-b (preplace (string-upcase (string+ c0"_"d)) sp-b c1d))
						(setf sp-b (preplace "[\\#]+" sp-b ""))
						(setf sp-b (preplace "SKY130_FD_PR__PFET_01V8_HVT" sp-b "PFET_HVT_SKY130"))
						(setf sp-b (preplace "SKY130_FD_PR__PFET_01V8" sp-b "PFET_SKY130"))
						(setf sp-b (preplace "SKY130_FD_PR__NFET_01V8_HVT" sp-b "NFET_HVT_SKY130"))
						(setf sp-b (preplace "SKY130_FD_PR__NFET_01V8" sp-b "NFET_SKY130"))
						(with-fp-w+ f *sp* (format f "~%~A~%" sp-b))
						(if (pscan "\\S+" gds-b)
						  (let ()
							(setf gds-b (preplace "VGND" gds-b "VSS"))
							(setf gds-b (preplace "VNB" gds-b "VPW"))
							(setf gds-b (preplace "VPB" gds-b "VNW"))
							(setf gds-b (preplace "VPWR" gds-b "VDD"))
							(setf gds-b (preplace (string-upcase (string+ c0"_"d))  gds-b c1d))
							))
						))
					(if (pscan "\\S+" gds-b) (set-cell (string+"sky130_fd_sc_hd__"c"_"d) (read-from-string gds-b)))
					)
				  )
				'(1 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48))
		   (format t "~%")
		   )
		 )
	   *stcs*)
  (writegds *gds* "sky130_fd_sc_hd")
  )

(merge-stc)